Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm NodeSUPERAID7 Workshop: "Process Variations from Equipment Effects to Circuit and Design Impacts"
Dresden, September 3, 2018
Welcome and orientation
J. Lorenz, Fraunhofer IISB
Process variability and the SUPERAID7 approach
J. Lorenz, Fraunhofer IISB
Statistical variability analysis in 28 nm UTBB FDSOI devices
A. Juge, STMicroelectronics
Variability-aware topography simulation
E. Bär, Fraunhofer IISB
Physical models for nanowire device simulation
V. Georgiev, University of Glasgow
Simulation of nanoscale interconnects
L. Filipovic, TU Wien
Variability-aware simulation of nanoscale devices
A. Asenov, V. Georgiev, University of Glasgow
LETI-NSP: advanced compact models for nanowire devices
O. Rozeau, CEA/Leti
Simulation tools for DTCO of advanced technology nodes
C. Millar, Synopsys
3D devices: experiments and simulation
S. Barraud, CEA/Leti
Summary
J. Lorenz, Fraunhofer IISB