Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm Node
Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm Node

SUPERAID7 - Work Packages

The complete list of publications is available here.

WP1: Project Management

WP2: Specifications and Benchmarks

Selected publications

J. Lorenz, E. Baer, S. Barraud, A.R. Brown, P. Evanschitzky, F. Kluepfel, L. Wang, Process Variability - Technological Challenge and Design Issue for Nanoscale Devices, Micromachines 10 (2019) 6   Download

J.K. Lorenz, A. Asenov, E. Bär, S. Barraud, F. Kluepfel, C. Millar, M. Nedjalkov, Process Variability for Devices at and beyond the 7 nm Node, ECS J. Solid State Science Technol. 7 (2018) P595   Download

T. Al-Ameri, V.P. Georgiev, F. Adamu-Lema, A. Asenov, Simulation Study of Vertically Stacked Lateral Si Nanowires Transistors for 5-nm CMOS Applications, J. Electron Dev. Soc. 5 (2017) 466   Download

J.-C. Barbé, S. Barraud, O. Rozeau, S. Martinie, J. Lacord, P. Blaise, Z. Zeng, L. Bourdet, F. Triozon, Y. Niquet, Stacked Nanowires/Nanosheets GAA MOSFET From Technology to Design Enablement, in: Proceedings of 2017 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2017), p. 5   Download

S. Barraud et al., Performance and Design Considerations for Gate-All-Around Stacked-NanoWires FETs, in: Proceedings International Electron Devices Meeting (IEDM) 2017   Download
 

WP3: Variation-aware Equipment and Process Simulation

Selected publications

J. Lorenz, E. Baer, S. Barraud, A.R. Brown, P. Evanschitzky, F. Kluepfel, L. Wang, Process Variability - Technological Challenge and Design Issue for Nanoscale Devices, Micromachines 10 (2019) 6   Download

E. Baer, J. Lorenz, The Effect of Etching and Deposition Processes on the Width of Spacers Created during Self-Aligned Double Patterning, in: Proceedings of 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2018), p. 236   Download

Z. Belete, E. Baer, A. Erdmann, Modeling of Block Copolymer Dry Etching for Directed Self-Assembly Lithography, Proc. of SPIE 10589 (2018) 105890U   Download

X. Klemenschits, S. Selberherr, L. Filipovic, Unified Feature Scale Model for Etching in SF6 and Cl Plasma Chemistries, in: Proceedings of EUROSOI-ULIS 2018,  2018, p. 65   Download

X. Klemenschits, S. Selberherr, L. Filipovic, Modeling of Gate Stack Patterning for Advanced Technology Nodes: A Review, Micromachines 9 (2018) 631   Download
 

WP4: Variation-aware Device and Interconnect Simulation

Selected publications

T. Sadi, C.  Medina-Bailon, M. Nedjalkov, J.  Lee, O. Badami, S. Berrada, H. Carillo-Nunez, V. Georgiev, S. Selberherr, A. Asenov, Simulation of the Impact of Ionized Impurity Scattering on the Total Mobility in Si Nanowire  Transistors, Materials 12 (2019) 124   Download

T. Al-Ameri, Correlation between the Golden Ratio and Nanowire Transistor Performance, Appl. Sci. 8 (2018) 54   Download

L. Filipovic, R.L. de Orio, Modeling the Influence of Grains and Material Interfaces on Electromigration, in: Proceedings of 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2018), p. 83   Download

C. Medina-Bailon, T. Sadi, M.  Nedjalkov, J. Lee, S. Berrada, H. Carillo-Nunez, V. Georgiev, S. Selberherr, A. Asenov, Study of the 1D Scattering Mechanisms´ Impact on the Mobility in Si Nanowire Transistors, in: Proceedings of EUROSOI-ULIS 2018, 2018, p. 17   Download

C.  Medina-Bailon,  T.  Sadi,  M.   Nedjalkov,  J.  Lee,  S.  Berrada, H. Carillo-Nunez,  V. Georgiev, S.  Selberherr, A. Asenov, Impact of the Effective Mass on the  Mobility in Si Nanowire Transistors, in: Proceedings of 2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2018), p. 297   Download

M. Nedjalkov, P. Ellinghaus, J. Weinbub, T. Sadi, A. Asenov, I. Dimov, S. Selberherr, Stochastic Analysis of Surface Roughness Models in Quantum Wires, Comp. Phys. Comm. 228 (2018) 30   Download

T. Al-Ameri, V. Georgiev, F. Adamu-Lema, A. Asenov, Does a Nanowire Transistor Follow the Golden Ratio, in: Proceedings of 2017 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2017), p. 57   Download

P. Ellinghaus, J. Weinbub, M. Nedjalkov, S. Selberherr, Analysis of Lense-governed Wigner Signed Particle Quantum Dynamics, Phys. Status Solidi RRL 11 (2017) 1700102   Download

L. Filipovic, R.L. de Orio, W. Zisser, S. Selberherr, Modeling Electromigration in Nanoscaled Copper Interconnects, in: Proceedings of 2017 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2017), p. 161   Download

WP5: Software Integration and Variation-aware Compact Models

Selected publications

J. Lorenz, E. Baer, S. Barraud, A.R. Brown, P. Evanschitzky, F. Kluepfel, L. Wang, Process Variability - Technological Challenge and Design Issue for Nanoscale Devices, Micromachines 10 (2019) 6   Download

J.K. Lorenz, A. Asenov, E. Bär, S. Barraud, C. Millar, M. Nedjalkov, Process Variability for Devices at and beyond the 7 nm Node, in: Proceedings of the 18th Symposium on Advanced CMOS-Compatible Semiconductor Devices, Ed. J.A. Martino, J.P. Raskin, S. Selberherr, H. Ishii, F. Gamiz, B.Y. Nguyen, A. Yoshino, The Electrochemical Society, ECS Transactions 85-8, 2018, p. 113   Download

J.K. Lorenz, A. Asenov, E. Bär, S. Barraud, F. Kluepfel, C. Millar, M. Nedjalkov, Process Variability for Devices at and beyond the 7 nm Node, ECS J. Solid State Science Technol. 7 (2018) P595   Download
 

WP6: Dissemination

WP7: Exploitation