SUPERAID7 - Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm Node

Process variability is getting ever more critical for aggressively scale More Moore devices in nanoelectronics. Effects from various sources of variations influence each other and lead to variations of the electrical, thermal and mechanical behavior of devices, interconnects and circuits.

Modelling and simulation (TCAD) allows us to investigate the impact of process variations and trace their effects on subsequent process steps and on devices and circuits.

Within SUPERAID7 we therefore

■  established a software system for the simulation of the impact of systematic and statistical process variations on advanced More Moore devices and circuits, down to the 7 nm node and below, including interconnects,

■  improved physical models and extend compact models,

■  studied advanced device architectures such as TriGate/ΩGate FETs or stacked nanowires, including alternative channel materials.

Project start / end: January 1, 2016 / December 31, 2018

Last update of webpage: January 17, 2020






Material from

Workshop "Process Variations from Equipment Effects to Circuit and Design Impacts" held in conjunction with ESSDERC 2018

We provide the presentations for download which allow you to get a good insight into the project results.


Invited Presentation at ECS Spring Meeting 2018

J. Lorenz et al., Process Variability for Devices at and beyond the 7 nm Node


Presentation at IEDM 2017

S. Barraud et al., Performance and Design Considerations for Gate-All-around Stacked-NanoWires FETs


Plenary Talk at

J.-C. Barbé et al., Stacked Nanowires/Nanosheets Gate-All-Around MOSFET from Technology to Design Enablement


Workshops at

The workshops "Simulation of Advanced Interconnects" and "Variability-Aware Design Technology Co-Optimization" were organized in cooperation with SUPERAID7.